beibei1234 发表于 2009-10-29 13:33:01

再发给老外40M的示波器（其实都差不多，可以说没有技术秘密）（AVR + FIFO + ADS830 + CPLD

This project is amazing – how simple construction can be comparing to its power. I wouldn’t say that it is easy to build project, but average electronics hobbyist could do this as DSO circuit and PCB image are ready for manufacturing.
点击此处下载全部工程文件 ourdev_497262.zip(文件大小:169K) (原文件名:eoscope_develop.zip)

http://cache.amobbs.com/bbs_upload782111/files_21/ourdev_497263.jpg
(原文件名:schematic_big.jpg)
点击此处下载电路图 ourdev_497265.rar(文件大小:658K) (原文件名:schematic_big.rar)

Oscilloscope samples signals at 40MSPS frequency which is much more than most powerful AVR microcontrollers can be clocked. For this there is 40MHz clock source used which is passed through programmable logic (XC9572 from Xilinx) IC. Analog signals are passed through OPA2652 operational amplifier and low-pass filter with 20MHz bandwidth. Then filtered signal enters ADS830 ADC chip which is clocked with 40MHz frequency. Converted signal then goes to AVR ATmega162 microcontroller. From where it goes to 240×128 (LMG6402PFLR with HD61830B controller) graphical LCD.

Features of AVR DSO (eOscope):

◦Maximum sample frequency: 40MSPS
◦Maximum input frequency: 5MHz
◦Maximum displayed frequency without aliasing: 10MHz
◦Input circuit bandwidth: 20MHz
◦Display resolution: 240×128 total, trace resolution 200×125
◦Sensitivity: 40mV/div
◦Coupling: DC
◦Input impedance: 10K
◦Power supply: single DC source 8V..10V, 1A
◦No incremental mode
◦Time base: 1s/div, 500ms/div, 200ms/div, 100ms/div, 50ms/div/, 20ms/div, 10ms/div, 5ms/div, 2ms/div, 1ms/div, 500us/div, 200us/div, 100us/div, 50us/div, 20us/div, 10us/div, 5us/div, 2us/div, 1us/div, 500ns/div
◦Trigger: digitally adjustable
◦Trace offset: digitally adjustable

http://cache.amobbs.com/bbs_upload782111/files_21/ourdev_497261.jpg
(原文件名:AVR_DSO.jpg)

jclhp 发表于 2009-10-29 13:50:34

顶一个 ，在哪个网站上看到的啊

moen 发表于 2009-10-29 14:24:16

you jia zhi

fsclub 发表于 2009-10-29 14:28:42

早就发过的。

WGJ5767351 发表于 2009-10-29 15:54:55

早看过了,

gdrc 发表于 2009-10-29 16:49:37

这个电路设计有些硬伤.

kanggnak 发表于 2009-10-29 18:16:57

和魏同学的差远了。才10M带宽。还是等魏同学的出来再玩。

beibei1234 发表于 2009-10-29 20:12:55

其实将AD换个80M的，模拟部分修改一下，也能达到80M采样，也能对付着用

thinke365 发表于 2012-4-8 19:21:45

gdrc 发表于 2009-10-29 16:49 static/image/common/back.gif
这个电路设计有些硬伤.

有神马硬伤？

lionsg 发表于 2012-4-27 10:55:36

示波器——入门看看

lionsg 发表于 2012-4-27 15:11:53

mark，老外的40M示波器

csdnct 发表于 2012-5-5 17:22:49

烧时间专用

ppdd 发表于 2012-5-7 02:07:12

路过～～～～～～～～～～～～～～～～～～

rei1984 发表于 2012-5-7 07:12:02

挺好的。 有什么不好的，ls 几位说说

fqforever 发表于 2012-5-7 07:52:45

感谢，非常的需要！再次谢谢！{:smile:}

inverter 发表于 2012-5-13 15:16:00

谢谢分享                   楼主辛苦了
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