KEAZ128参考手册是不是少了一章讲NVIC的？
在看别人的程序NVIC_ICPR |= 1 << (22 % 32);NVIC_ISER |= 1 << (22 % 32);/*for PIT0*/
NVIC_ICPR |= 1 << (23 % 32);
NVIC_ISER |= 1 << (23 % 32);/*for PIT1*/
NVIC_ICPR |= 1 << (15 % 32);
NVIC_ISER |= 1 << (15 % 32);/*for ADC*/
去参考手册上找 完全没有这几个寄存器的介绍啊 看cortex-m0+的手册 鲜衣怒马 发表于 2015-9-16 15:41
看cortex-m0+的手册
所有M0的芯片外设中断号都是一样的？ 这个是在ARM 的手册里有介绍 yezhenke 发表于 2015-9-16 15:48
所有M0的芯片外设中断号都是一样的？
外设中断号参见官方库中vector.c vector.h ISR.h这几个文件
以下是KE系列的官方库
vector.h中定义
const vector_entry__vector_table[] __attribute__((at(0x00))) =
{
VECTOR_000, /* Initial SP */
VECTOR_001, /* Initial PC */
VECTOR_002,
VECTOR_003,
VECTOR_004,
VECTOR_005,
VECTOR_006,
VECTOR_007,
VECTOR_008,
VECTOR_009,
VECTOR_010,
VECTOR_011,
VECTOR_012,
VECTOR_013,
VECTOR_014,
VECTOR_015,
VECTOR_016,
VECTOR_017,
VECTOR_018,
VECTOR_019,
VECTOR_020,
VECTOR_021,
VECTOR_022,
VECTOR_023,
VECTOR_024,
VECTOR_025,
VECTOR_026,
VECTOR_027,
VECTOR_028,
VECTOR_029,
VECTOR_030,
VECTOR_031,
VECTOR_032,
VECTOR_033,
VECTOR_034,
VECTOR_035,
VECTOR_036,
VECTOR_037,
VECTOR_038,
VECTOR_039,
VECTOR_040,
VECTOR_041,
VECTOR_042,
VECTOR_043,
VECTOR_044,
VECTOR_045,
VECTOR_046,
VECTOR_047 // END of real vector table
};
vector.h中
// Address Vector IRQ Source module Source description
#define VECTOR_000 (pointer*)__BOOT_STACK_ADDRESS // ARM core Initial Supervisor SP
#define VECTOR_001 __startup // 0x0000_0004 1 - ARM core Initial Program Counter
#endif
#define VECTOR_002 default_isr // 0x0000_0008 2 - ARM core Non-maskable Interrupt (NMI)
#define VECTOR_003 default_isr // 0x0000_000C 3 - ARM core Hard Fault
#define VECTOR_004 default_isr // 0x0000_0010 4 -
#define VECTOR_005 default_isr // 0x0000_0014 5 - ARM core Bus Fault
#define VECTOR_006 default_isr // 0x0000_0018 6 - ARM core Usage Fault
#define VECTOR_007 default_isr // 0x0000_001C 7 -
#define VECTOR_008 default_isr // 0x0000_0020 8 -
#define VECTOR_009 default_isr // 0x0000_0024 9 -
#define VECTOR_010 default_isr // 0x0000_0028 10 -
#define VECTOR_011 default_isr // 0x0000_002C 11 - ARM core Supervisor call (SVCall)
#define VECTOR_012 default_isr // 0x0000_0030 12 - ARM core Debug Monitor
#define VECTOR_013 default_isr // 0x0000_0034 13 -
#define VECTOR_014 default_isr // 0x0000_0038 14 - ARM core Pendable request for system service (PendableSrvReq)
#define VECTOR_015 default_isr // 0x0000_003C 15 - ARM core System tick timer (SysTick)
#define VECTOR_016 default_isr // 0x0000_0040 16 0 Reserved DMA DMA Channel 0 transfer complete
#define VECTOR_017 default_isr // 0x0000_0044 17 1 Reserved DMA DMA Channel 1 transfer complete
#define VECTOR_018 default_isr // 0x0000_0048 18 2 Reserved DMA DMA Channel 2 transfer complete
#define VECTOR_019 default_isr // 0x0000_004C 19 3 Reserved DMA DMA Channel 3 transfer complete
#define VECTOR_020 default_isr // 0x0000_0050 20 4 Reserved MCM MCM
#define VECTOR_021 default_isr // 0x0000_0054 21 5 NVM FTMRH flash memory command complete,ECC fault
#define VECTOR_022 default_isr // 0x0000_0058 22 6 PMC LVD,LVW interrupt
#define VECTOR_023 default_isr // 0x0000_005C 23 7 LLWU LLWU/IRQ
#define VECTOR_024 default_isr // 0x0000_0060 24 8 I2C0 I2C
#define VECTOR_025 default_isr // 0x0000_0064 25 9 - --
#define VECTOR_026 default_isr // 0x0000_0068 26 10 SPI0 SPI0
#define VECTOR_027 default_isr // 0x0000_006C 27 11 SPI1 SPI1
#define VECTOR_028 default_isr // 0x0000_0070 28 12 SCI0 UART0
#define VECTOR_029 default_isr // 0x0000_0074 29 13 SCI1 UART1
#define VECTOR_030 default_isr // 0x0000_0078 30 14 SCI2 UART2
#define VECTOR_031 default_isr // 0x0000_007C 31 15 ADC0 ADC conversion complete
#define VECTOR_032 default_isr // 0x0000_0080 32 16 ACMP0 ACMP0
#define VECTOR_033 default_isr // 0x0000_0084 33 17 FTM0 FlexTimer0
#define VECTOR_034 default_isr // 0x0000_0088 34 18 FTM1 FlexTimer1
#define VECTOR_035 default_isr // 0x0000_008C 35 19 FTM2 FlexTimer2
#define VECTOR_036 default_isr // 0x0000_0090 36 20 RTC RTC overflow
#define VECTOR_037 default_isr // 0x0000_0094 37 21 ACMP1 ACMP1
#define VECTOR_038 default_isr // 0x0000_0098 38 22 PIT_CH0 PIT_CH0 overflow
#define VECTOR_039 default_isr // 0x0000_009C 39 23 PIT_CH1 PIT_CH1 overflow
#define VECTOR_040 default_isr // 0x0000_00A0 40 24 KBI0 Keyboard0 interrupt
#define VECTOR_041 default_isr // 0x0000_00A4 41 25 KBI1 Keyboard1 interrupt
#define VECTOR_042 default_isr // 0x0000_00A8 42 26 Reserved ---
#define VECTOR_043 default_isr // 0x0000_00AC 43 27 ICS ICS loss of lock
#define VECTOR_044 default_isr // 0x0000_00B0 44 28 WDOG Watchdog timeout
#define VECTOR_045 default_isr // 0x0000_00B4 45 29 Reserved
#define VECTOR_046 default_isr // 0x0000_00B8 46 30 Reserved
#define VECTOR_047 default_isr // 0x0000_00BC 47 31 Reserved // END of real vector table
工程文件 ISR.h中（以ACMP为例）
#undefVECTOR_032
#define VECTOR_032 ACMP0_Isr
#undefVECTOR_037
#define VECTOR_037 ACMP1_Isr
extern void ACMP0_Isr(void);
extern void ACMP1_Isr(void);
具体流程明白了吧 鲜衣怒马 发表于 2015-9-21 10:29
外设中断号参见官方库中vector.c vector.h ISR.h这几个文件
以下是KE系列的官方库
l明白了 辛苦了{:lol:}多谢啦！
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