红外遥控解码实现
实现class IrNec(irMargin: Int) extends Component {
val io = new Bundle {
val sampleClk = in Bool()
val ir = in Bool()
val req = out Bool()
val userCode = out Bits (8 bit)
val dataCode = out Bits (8 bit)
}
val irBoundary = new Bundle {
val bdyMs9 = 9000
val bdyMs4_5 = 4500
val bdyMs2_25 = 2250
val bdyMs0_56 = 560
val bdyMs1_69 = 1690
val bdyMs42_02 = 42020
val bdyMs98_19 = 98190
}
def maxBoundary(m: Int) = {
(m * (100 + irMargin) / 100).toInt
}
def minBoundary(m: Int) = {
(m * (100 - irMargin) / 100).toInt
}
val ir = RegNext(io.ir).init(True)
val samples = History(ir, 3, True)
val irFilted = RegNext(MajorityVote(samples))
val data = Reg(Bits(32 bit))
val irFsm = new StateMachine {
val cnt = Reg(UInt(log2Up(maxBoundary(110000)) bit))
val bitCnt = Reg(UInt(6 bit))
val stateIdle: State = new State with EntryPoint {
whenIsActive {
when(!irFilted) {
goto(stateHeadL)
}
}
}
val stateHeadL: State = new State {
onEntry {
cnt.clearAll()
}
whenIsActive {
when(irFilted) {
goto(stateIdle)
}.elsewhen(cnt === minBoundary(irBoundary.bdyMs9)) {
goto(stateHeadL_1)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateHeadL_1: State = new State {
whenIsActive {
when(irFilted) {
goto(stateHeadH)
}.elsewhen(cnt === maxBoundary(irBoundary.bdyMs9)) {
goto(stateIdle)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateHeadH: State = new State {
onEntry {
cnt.clearAll()
}
whenIsActive {
when(!irFilted) {
goto(stateIdle)
}.elsewhen(cnt === minBoundary(irBoundary.bdyMs4_5)) {
goto(stateHeadH_1)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateHeadH_1: State = new State {
whenIsActive {
when(!irFilted) {
goto(stateDataL)
bitCnt.clearAll()
data.clearAll()
}.elsewhen(cnt === maxBoundary(irBoundary.bdyMs4_5)) {
goto(stateIdle)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateDataL: State = new State {
onEntry {
cnt.clearAll()
}
whenIsActive {
when(irFilted) {
goto(stateIdle)
}.elsewhen(cnt === minBoundary((irBoundary.bdyMs0_56))) {
goto(stateDataL_1)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateDataL_1: State = new State {
whenIsActive {
when(irFilted) {
when(bitCnt === 0x20) {
goto(stateDataEnd)
}.otherwise {
goto(stateDataH)
}
}.elsewhen(cnt === maxBoundary(irBoundary.bdyMs0_56)) {
goto(stateIdle)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateDataH: State = new State {
onEntry {
cnt.clearAll()
}
whenIsActive {
when(!irFilted) {
goto(stateIdle)
}.elsewhen(cnt === minBoundary(irBoundary.bdyMs0_56)) {
goto(stateDataH_1)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateDataH_1: State = new State {
whenIsActive {
when(!irFilted) {
goto(stateDataL)
bitCnt := bitCnt + 1
//data(bitCnt) := False
}.elsewhen(cnt === maxBoundary(irBoundary.bdyMs0_56)) {
goto(stateDataH_2)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateDataH_2: State = new State {
whenIsActive {
when(!irFilted) {
goto(stateIdle)
}.elsewhen(cnt === minBoundary(irBoundary.bdyMs1_69)) {
goto(stateDataH_3)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateDataH_3: State = new State {
whenIsActive {
when(!irFilted) {
goto(stateDataL)
bitCnt := bitCnt + 1
data(bitCnt(4 downto 0)) := True
}.elsewhen(cnt === maxBoundary(irBoundary.bdyMs1_69)) {
goto(stateIdle)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateDataEnd: State = new State {
onEntry {
cnt.clearAll()
}
whenIsActive {
when(!irFilted) {
goto(stateRepeatHeadL)
}.elsewhen(cnt === minBoundary(irBoundary.bdyMs42_02)) {
goto(stateIdle)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateRepeatHeadL: State = new State {
onEntry {
cnt.clearAll()
}
whenIsActive {
when(irFilted) {
goto(stateIdle)
}.elsewhen(cnt === minBoundary(irBoundary.bdyMs9)) {
goto(stateRepeatHeadL_1)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateRepeatHeadL_1: State = new State {
whenIsActive {
when(irFilted) {
goto(stateRepeatHeadH)
}.elsewhen(cnt === maxBoundary(irBoundary.bdyMs9)) {
goto(stateIdle)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateRepeatHeadH: State = new State {
onEntry {
cnt.clearAll()
}
whenIsActive {
when(!irFilted) {
goto(stateIdle)
}.elsewhen(cnt === minBoundary(irBoundary.bdyMs2_25)) {
goto(stateRepeatHeadH_1)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateRepeatHeadH_1: State = new State {
whenIsActive {
when(!irFilted) {
goto(stateRepeatEndL)
}.elsewhen(cnt === maxBoundary(irBoundary.bdyMs2_25)) {
goto(stateIdle)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateRepeatEndL: State = new State {
onEntry {
cnt.clearAll()
}
whenIsActive {
when(irFilted) {
goto(stateIdle)
}.elsewhen(cnt === minBoundary((irBoundary.bdyMs0_56))) {
goto(stateDataL_1)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateRepeatEndL_1: State = new State {
whenIsActive {
when(irFilted) {
goto(stateRepeatEndH)
}.elsewhen(cnt === maxBoundary(irBoundary.bdyMs0_56)) {
goto(stateIdle)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateRepeatEndH: State = new State {
whenIsActive {
when(!irFilted) {
goto(stateIdle)
}.elsewhen(cnt === minBoundary(irBoundary.bdyMs98_19)) {
goto(stateRepeatEndH_1)
}.otherwise {
cnt := cnt + 1
}
}
}
val stateRepeatEndH_1: State = new State {
whenIsActive {
when(!irFilted) {
goto(stateRepeatHeadL)
}.elsewhen(cnt === maxBoundary(irBoundary.bdyMs98_19)) {
goto(stateIdle)
}.otherwise {
cnt := cnt + 1
}
}
}
}
val irReq = RegInit(False)
when(irFsm.isEntering(irFsm.stateDataEnd)) {
when((data(31 downto 24) ^ data(23 downto 16)).andR
& (data(15 downto 8) ^ data(7 downto 0)).andR) {
irReq.set()
}
} otherwise {
irReq.clear()
}
io.req := irReq
io.userCode := data(7 downto 0)
io.dataCode := data(23 downto 16)
}
仿真
doSim { dut =>
dut.clockDomain.forkStimulus(period = 1000)
val us = 1000
val ms = 1000*1000
def irSendHead():Unit ={
dut.io.ir #= false
sleep(9*ms)
dut.io.ir #= true
sleep(45*ms/10)
}
def irSendBit(b:Int):Unit = {
dut.io.ir #= false
sleep(560*us)
dut.io.ir #= true
if(b!=0){
sleep(1685*us)
}else{
sleep(560*us)
}
}
def irSendByte(d:Int):Unit={
irSendBit(d & (0x01 << 0))
irSendBit(d & (0x01 << 1))
irSendBit(d & (0x01 << 2))
irSendBit(d & (0x01 << 3))
irSendBit(d & (0x01 << 4))
irSendBit(d & (0x01 << 5))
irSendBit(d & (0x01 << 6))
irSendBit(d & (0x01 << 7))
}
def irSendTail():Unit ={
dut.io.ir #= false
sleep(560*us)
dut.io.ir #= true
sleep(500*us)
sleep(40*ms)
}
def irSendRepeat():Unit={
dut.io.ir #= false
sleep(9*ms)
dut.io.ir #= true
sleep(225*ms/100)
dut.io.ir #= false
sleep(560*us)
dut.io.ir #= true
sleep(102*ms)
}
def irSend(userCode: Int,dataCode:Int): Unit ={
irSendHead()
irSendByte(userCode)
irSendByte(~userCode)
irSendByte(dataCode)
irSendByte(~dataCode)
irSendTail()
}
val irThread = fork{
dut.io.ir #= true
sleep(20*ms)
irSend(0x80,0x04)
irSendRepeat()
irSendRepeat()
irSend(0x80,0x06)
}
Verilog
module IrNec (
input io_sampleClk,
input io_ir,
outputio_req,
output io_userCode,
output io_dataCode,
input clk,
input reset);
wire_zz_1_;
wire_zz_2_;
wire_zz_3_;
wire_zz_4_;
wire_zz_5_;
wire_zz_6_;
wire_zz_7_;
wire_zz_8_;
wire_zz_9_;
wire_zz_10_;
wire_zz_11_;
wire_zz_12_;
wire_zz_13_;
wire_zz_14_;
wire_zz_15_;
wire_zz_16_;
wire_zz_17_;
wire_zz_18_;
wire_zz_19_;
wire_zz_20_;
wire_zz_21_;
wire_zz_22_;
wire_zz_23_;
wire_zz_24_;
wire_zz_25_;
wire_zz_26_;
wire_zz_27_;
wire_zz_28_;
wire_zz_29_;
wire_zz_30_;
regir;
wiresamples_0;
regsamples_1;
regsamples_2;
regirFilted;
reg data;
wireirFsm_wantExit;
reg irFsm_cnt;
reg irFsm_bitCnt;
regirReq;
reg `irFsm_enumDefinition_binary_sequential_type irFsm_stateReg;
reg `irFsm_enumDefinition_binary_sequential_type irFsm_stateNext;
`ifndef SYNTHESIS
reg irFsm_stateReg_string;
reg irFsm_stateNext_string;
`endif
assign _zz_1_ = (irFsm_cnt == (18'b000001110000100000));
assign _zz_2_ = (irFsm_cnt == (18'b000010101000110000));
assign _zz_3_ = (! irFilted);
assign _zz_4_ = (irFsm_cnt == (18'b000000111000010000));
assign _zz_5_ = (! irFilted);
assign _zz_6_ = (irFsm_cnt == (18'b000001010100011000));
assign _zz_7_ = (irFsm_cnt == (18'b000000000111000000));
assign _zz_8_ = (irFsm_cnt == (18'b000000001010100000));
assign _zz_9_ = (! irFilted);
assign _zz_10_ = (irFsm_cnt == (18'b000000000111000000));
assign _zz_11_ = (! irFilted);
assign _zz_12_ = (irFsm_cnt == (18'b000000001010100000));
assign _zz_13_ = (! irFilted);
assign _zz_14_ = (irFsm_cnt == (18'b000000010101001000));
assign _zz_15_ = (! irFilted);
assign _zz_16_ = (irFsm_cnt == (18'b000000011111101100));
assign _zz_17_ = (! irFilted);
assign _zz_18_ = (irFsm_cnt == (18'b001000001101010000));
assign _zz_19_ = (irFsm_cnt == (18'b000001110000100000));
assign _zz_20_ = (irFsm_cnt == (18'b000010101000110000));
assign _zz_21_ = (! irFilted);
assign _zz_22_ = (irFsm_cnt == (18'b000000011100001000));
assign _zz_23_ = (! irFilted);
assign _zz_24_ = (irFsm_cnt == (18'b000000101010001100));
assign _zz_25_ = (irFsm_cnt == (18'b000000000111000000));
assign _zz_26_ = (irFsm_cnt == (18'b000000001010100000));
assign _zz_27_ = (! irFilted);
assign _zz_28_ = (irFsm_cnt == (18'b010011001011011000));
assign _zz_29_ = (! irFilted);
assign _zz_30_ = (irFsm_cnt == (18'b011100110001000100));
`ifndef SYNTHESIS
always @(*) begin
case(irFsm_stateReg)
`irFsm_enumDefinition_binary_sequential_boot : irFsm_stateReg_string = "boot ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateIdle : irFsm_stateReg_string = "irFsm_stateIdle ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL : irFsm_stateReg_string = "irFsm_stateHeadL ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL_1 : irFsm_stateReg_string = "irFsm_stateHeadL_1 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH : irFsm_stateReg_string = "irFsm_stateHeadH ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH_1 : irFsm_stateReg_string = "irFsm_stateHeadH_1 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataL : irFsm_stateReg_string = "irFsm_stateDataL ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataL_1 : irFsm_stateReg_string = "irFsm_stateDataL_1 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH : irFsm_stateReg_string = "irFsm_stateDataH ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_1 : irFsm_stateReg_string = "irFsm_stateDataH_1 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_2 : irFsm_stateReg_string = "irFsm_stateDataH_2 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_3 : irFsm_stateReg_string = "irFsm_stateDataH_3 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataEnd : irFsm_stateReg_string = "irFsm_stateDataEnd ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL : irFsm_stateReg_string = "irFsm_stateRepeatHeadL";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL_1 : irFsm_stateReg_string = "irFsm_stateRepeatHeadL_1";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH : irFsm_stateReg_string = "irFsm_stateRepeatHeadH";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH_1 : irFsm_stateReg_string = "irFsm_stateRepeatHeadH_1";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL : irFsm_stateReg_string = "irFsm_stateRepeatEndL ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL_1 : irFsm_stateReg_string = "irFsm_stateRepeatEndL_1 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndH : irFsm_stateReg_string = "irFsm_stateRepeatEndH ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndH_1 : irFsm_stateReg_string = "irFsm_stateRepeatEndH_1 ";
default : irFsm_stateReg_string = "????????????????????????";
endcase
end
always @(*) begin
case(irFsm_stateNext)
`irFsm_enumDefinition_binary_sequential_boot : irFsm_stateNext_string = "boot ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateIdle : irFsm_stateNext_string = "irFsm_stateIdle ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL : irFsm_stateNext_string = "irFsm_stateHeadL ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL_1 : irFsm_stateNext_string = "irFsm_stateHeadL_1 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH : irFsm_stateNext_string = "irFsm_stateHeadH ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH_1 : irFsm_stateNext_string = "irFsm_stateHeadH_1 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataL : irFsm_stateNext_string = "irFsm_stateDataL ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataL_1 : irFsm_stateNext_string = "irFsm_stateDataL_1 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH : irFsm_stateNext_string = "irFsm_stateDataH ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_1 : irFsm_stateNext_string = "irFsm_stateDataH_1 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_2 : irFsm_stateNext_string = "irFsm_stateDataH_2 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_3 : irFsm_stateNext_string = "irFsm_stateDataH_3 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataEnd : irFsm_stateNext_string = "irFsm_stateDataEnd ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL : irFsm_stateNext_string = "irFsm_stateRepeatHeadL";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL_1 : irFsm_stateNext_string = "irFsm_stateRepeatHeadL_1";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH : irFsm_stateNext_string = "irFsm_stateRepeatHeadH";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH_1 : irFsm_stateNext_string = "irFsm_stateRepeatHeadH_1";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL : irFsm_stateNext_string = "irFsm_stateRepeatEndL ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL_1 : irFsm_stateNext_string = "irFsm_stateRepeatEndL_1 ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndH : irFsm_stateNext_string = "irFsm_stateRepeatEndH ";
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndH_1 : irFsm_stateNext_string = "irFsm_stateRepeatEndH_1 ";
default : irFsm_stateNext_string = "????????????????????????";
endcase
end
`endif
assign samples_0 = ir;
assign irFsm_wantExit = 1'b0;
assign io_req = irReq;
assign io_userCode = data;
assign io_dataCode = data;
always @ (*) begin
irFsm_stateNext = irFsm_stateReg;
case(irFsm_stateReg)
`irFsm_enumDefinition_binary_sequential_irFsm_stateIdle : begin
if((! irFilted))begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL;
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL : begin
if(irFilted)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end else begin
if(_zz_1_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL_1;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL_1 : begin
if(irFilted)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH;
end else begin
if(_zz_2_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH : begin
if(_zz_3_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end else begin
if(_zz_4_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH_1;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH_1 : begin
if(_zz_5_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateDataL;
end else begin
if(_zz_6_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataL : begin
if(irFilted)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end else begin
if(_zz_7_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateDataL_1;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataL_1 : begin
if(irFilted)begin
if((irFsm_bitCnt == (6'b100000)))begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateDataEnd;
end else begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateDataH;
end
end else begin
if(_zz_8_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH : begin
if(_zz_9_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end else begin
if(_zz_10_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_1;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_1 : begin
if(_zz_11_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateDataL;
end else begin
if(_zz_12_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_2;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_2 : begin
if(_zz_13_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end else begin
if(_zz_14_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_3;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_3 : begin
if(_zz_15_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateDataL;
end else begin
if(_zz_16_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataEnd : begin
if(_zz_17_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL;
end else begin
if(_zz_18_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL : begin
if(irFilted)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end else begin
if(_zz_19_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL_1;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL_1 : begin
if(irFilted)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH;
end else begin
if(_zz_20_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH : begin
if(_zz_21_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end else begin
if(_zz_22_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH_1;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH_1 : begin
if(_zz_23_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL;
end else begin
if(_zz_24_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL : begin
if(irFilted)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end else begin
if(_zz_25_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateDataL_1;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL_1 : begin
if(irFilted)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndH;
end else begin
if(_zz_26_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndH : begin
if(_zz_27_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end else begin
if(_zz_28_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndH_1;
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndH_1 : begin
if(_zz_29_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL;
end else begin
if(_zz_30_)begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end
end
end
default : begin
irFsm_stateNext = `irFsm_enumDefinition_binary_sequential_irFsm_stateIdle;
end
endcase
end
always @ (posedge clk or posedge reset) begin
if (reset) begin
ir <= 1'b1;
irReq <= 1'b0;
irFsm_stateReg <= `irFsm_enumDefinition_binary_sequential_boot;
end else begin
ir <= io_ir;
if(((irFsm_stateNext == `irFsm_enumDefinition_binary_sequential_irFsm_stateDataEnd) && (irFsm_stateReg != `irFsm_enumDefinition_binary_sequential_irFsm_stateDataEnd)))begin
if((((data ^ data) == (8'b11111111)) && ((data ^ data) == (8'b11111111))))begin
irReq <= 1'b1;
end
end else begin
irReq <= 1'b0;
end
irFsm_stateReg <= irFsm_stateNext;
end
end
always @ (posedge clk) begin
if(1'b1)begin
samples_1 <= samples_0;
end
if(1'b1)begin
samples_2 <= samples_1;
end
irFilted <= (((1'b0 || ((1'b1 && samples_0) && samples_1)) || ((1'b1 && samples_0) && samples_2)) || ((1'b1 && samples_1) && samples_2));
case(irFsm_stateReg)
`irFsm_enumDefinition_binary_sequential_irFsm_stateIdle : begin
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL : begin
if(! irFilted) begin
if(! _zz_1_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL_1 : begin
if(! irFilted) begin
if(! _zz_2_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH : begin
if(! _zz_3_) begin
if(! _zz_4_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH_1 : begin
if(_zz_5_)begin
irFsm_bitCnt <= (6'b000000);
data <= (32'b00000000000000000000000000000000);
end else begin
if(! _zz_6_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataL : begin
if(! irFilted) begin
if(! _zz_7_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataL_1 : begin
if(! irFilted) begin
if(! _zz_8_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH : begin
if(! _zz_9_) begin
if(! _zz_10_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_1 : begin
if(_zz_11_)begin
irFsm_bitCnt <= (irFsm_bitCnt + (6'b000001));
end else begin
if(! _zz_12_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_2 : begin
if(! _zz_13_) begin
if(! _zz_14_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataH_3 : begin
if(_zz_15_)begin
irFsm_bitCnt <= (irFsm_bitCnt + (6'b000001));
data] <= 1'b1;
end else begin
if(! _zz_16_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateDataEnd : begin
if(! _zz_17_) begin
if(! _zz_18_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL : begin
if(! irFilted) begin
if(! _zz_19_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL_1 : begin
if(! irFilted) begin
if(! _zz_20_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH : begin
if(! _zz_21_) begin
if(! _zz_22_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH_1 : begin
if(! _zz_23_) begin
if(! _zz_24_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL : begin
if(! irFilted) begin
if(! _zz_25_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL_1 : begin
if(! irFilted) begin
if(! _zz_26_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndH : begin
if(! _zz_27_) begin
if(! _zz_28_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
`irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndH_1 : begin
if(! _zz_29_) begin
if(! _zz_30_) begin
irFsm_cnt <= (irFsm_cnt + (18'b000000000000000001));
end
end
end
default : begin
end
endcase
if(((! (irFsm_stateReg == `irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL)) && (irFsm_stateNext == `irFsm_enumDefinition_binary_sequential_irFsm_stateHeadL)))begin
irFsm_cnt <= (18'b000000000000000000);
end
if(((! (irFsm_stateReg == `irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH)) && (irFsm_stateNext == `irFsm_enumDefinition_binary_sequential_irFsm_stateHeadH)))begin
irFsm_cnt <= (18'b000000000000000000);
end
if(((! (irFsm_stateReg == `irFsm_enumDefinition_binary_sequential_irFsm_stateDataL)) && (irFsm_stateNext == `irFsm_enumDefinition_binary_sequential_irFsm_stateDataL)))begin
irFsm_cnt <= (18'b000000000000000000);
end
if(((! (irFsm_stateReg == `irFsm_enumDefinition_binary_sequential_irFsm_stateDataH)) && (irFsm_stateNext == `irFsm_enumDefinition_binary_sequential_irFsm_stateDataH)))begin
irFsm_cnt <= (18'b000000000000000000);
end
if(((! (irFsm_stateReg == `irFsm_enumDefinition_binary_sequential_irFsm_stateDataEnd)) && (irFsm_stateNext == `irFsm_enumDefinition_binary_sequential_irFsm_stateDataEnd)))begin
irFsm_cnt <= (18'b000000000000000000);
end
if(((! (irFsm_stateReg == `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL)) && (irFsm_stateNext == `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadL)))begin
irFsm_cnt <= (18'b000000000000000000);
end
if(((! (irFsm_stateReg == `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH)) && (irFsm_stateNext == `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatHeadH)))begin
irFsm_cnt <= (18'b000000000000000000);
end
if(((! (irFsm_stateReg == `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL)) && (irFsm_stateNext == `irFsm_enumDefinition_binary_sequential_irFsm_stateRepeatEndL)))begin
irFsm_cnt <= (18'b000000000000000000);
end
end
endmodule 这是C++啊？
解码+自学习就有意思了{:lol:} 发上来干嘛？无厘头？ spinalHDL，不错，就是 style B 的 FSM 应该更好读一些，然后用 StateDelay 应该能简化一些代码。 abutter 发表于 2019-11-1 18:55
spinalHDL，不错，就是 style B 的 FSM 应该更好读一些，然后用 StateDelay 应该能简化一些代码。 ...
好主意，下一个练习就这么办 本帖最后由 abutter 于 2019-11-1 19:47 编辑
还有就是 irBoundary 可以试试 SpinalEnum，用 SpinalEnumEncoding 构造。而且这个应该是跟时钟周期有关的，case class 的参数里面没有带配置参数。 begin...end,像D abutter 发表于 2019-11-1 19:46
还有就是 irBoundary 可以试试 SpinalEnum，用 SpinalEnumEncoding 构造。而且这个应该是跟时钟周期有关的 ...
这个之前没用过，需要学习下
好无意义！一行注释没有，完全不知道什么逻辑，跟乱码没区别 Eworm001 发表于 2019-11-3 01:01
这个之前没用过，需要学习下
我看了一下网络上小梅哥 IR 的实现思路，准备空闲了写一下看看。互相学习一下。 Thank you !!!
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