新手求助，串行数据存入BRAM，有没有好点的写法？
本帖最后由 awoyzc1 于 2020-3-12 14:44 编辑我需要将一个2500位左右的串行数据存入 一个256*16的RAM空间
要求每个地址10位 总共占用 250个地址位，怎么样写法好？
数据串行输入一根时钟一根数据
*当然也可以给出一个口子作为反馈线
这里怎么实现即高效又不浪费资源。新手求助了
module ram(
input S_CLK， //输入时钟
input S_DAT，//输入信号
input 其他
);
reg WADDR_c;
reg WCLK_c;
reg WCLKE_c;
reg WDATA_c;
reg WE_c;
reg MASK_c;
//ERBRAM initialization
SB_RAM256x16 ram256x16_inst (
.RDATA(RDATA_c), //Read Data output
.RADDR(RADDR_c), //Read Address input. Selects one of 256 possible RAM locations
.RCLK(CLK12M), //Read Clock input. Default rising-edge, but with falling-edge option
.RCLKE(RCLKE_c), //Read Clock Enable input
.RE(RE_c), //Read Enable input. Only available for SB_RAM256x16 configurations
//写部分
.WADDR(WADDR_c), //Write Address input. Selects one of 256 possible RAM locations
.WCLK(CLK12M), //Write Clock input. Default rising-edge, but with falling-edge option
.WCLKE(WCLKE_c), //Write Clock Enable input
.WDATA(WDATA_c), //Write Data input
.WE(WE_c), //Write Enable input
.MASK(MASK_c) //Masks write operations for individual data bit-lines,0 = write bit; 1 = don't write bit
);
always@(posedge S_CLK)
begin
这里怎么实现即高效又不浪费资源。新手求助了
end
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