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本帖最后由 FSL_TICS_ZP 于 2014-9-15 08:57 编辑
SoC Design and Verification Intern Openings in Freescale Shanghai
飞思卡尔半导体总部位于美国德克萨斯州奥斯汀市,其设计、研发、生产及销售机构遍布 20 多个国家和地区。在创新、质量和注重实效的企业文化引领下,全球 18,000 名员工齐心协作、锐意进取。秉承让世界更智能的理念,我们始终是嵌入式处理解决方案的领导者。
飞思卡尔在嵌入式处理解决方案领域处于全球领先地位,推动汽车电子、消费类电子、工业电子以及网络设备市场向前发展。从微处理器和微控制器,到传感器、模拟 IC 以及连接器件 ——我们的技术和产品始终为创新奠定基础,让世界变得更环保、更安全、更健康,让人们的联系更加紧密。
飞思卡尔(中国)近期发布大量实习生职位(详见后文的职位列表),此次实习生职位只针对2016年及以后毕业的硕士研究生,欢迎大家踊跃报名~~
本次实习期为6-12个月,实习生日后很有可能成为飞思卡尔的正式成员,还等什么?赶紧报名!
报名方式:大家可以将自己的简历以“工作地点-职位名称-就读学校-毕业年份”为标题将简历发送至:campus@freescale.com
另外,我们的招聘职位都是实时更新的,欢迎大家多多关注我们:http://www.freescale.com/zh-Hans ... ge.jsp?code=CAREERS
具体要求如下:
Requirements:
- Planning and coordination of tasks to meet the design verification goals on time and with quality.
- Testbench generation, test patterns development and simulation on module/chip level, using Verilog, System Verilog, C/C++ and other verification languages.
- Logic design & implementation by Verilog for SOC and IP development.
- Participate in logic synthesis, DFT, timing analysis and closure.
- Write the technical documents/papers as required.
- Cooperate with and provide support to other functional teams (S&A,SW,TE/PE) in the NPI execution.
Responsibilities:
- Master or above on Computer Science, Electronics, Communications, Microelectronics Engineering.
- with good knowledge of IC design flow.
- Hands-on experience on Object Oriented verification such as UVM/OVM, C++ with good understanding of compiler/linkers will be a big plus.
- Relevant experience on ARM, MCU/DSP based SOC design for multimedia, wireless communication and consumer areas is a plus.
- Professional and enthusiastic approach to work; Pro-active and self motivating;
- Willingness to be flexible and accept new challenges
- Relevant experience in digital logic design and verifications based on high-level languages
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