quartus II 15.0在使用FFT ip核时编译总出错，提示time-limited file
我准备用quartus II做个FFT的仿真实验，在添加完fft ip核之后，编译工程提示很多关于fft的错误，有网友说去掉setting中的EDA工具，确实编译通过了，但是生成不了仿真所需的文件啊。或者有什么可以进行仿真的方法，教我一下，谢谢。错误有192个主要是以下两种错误
错误提示：
Error (204012): Can't generate netlist output files because the file "D:/altera/FPGA/MyProject/fft/myfft/synthesis/submodules/asj_fft_bfp_ctrl.vhd" is an OpenCore Plus time-limited file
Error (204012): Can't generate netlist output files because the file "D:/altera/FPGA/MyProject/fft/myfft/synthesis/submodules/asj_fft_tdl_bit.vhd" is an OpenCore Plus time-limited file
Error (204012): Can't generate netlist output files because the file "D:/altera/FPGA/MyProject/fft/myfft/synthesis/submodules/twid_rom.vhd" is an OpenCore Plus time-limited file
Error (204012): Can't generate netlist output files because the file "D:/altera/FPGA/MyProject/fft/myfft/synthesis/submodules/asj_fft_bfp_o.vhd" is an OpenCore Plus time-limited file
Error (204012): Can't generate netlist output files because the file "D:/altera/FPGA/MyProject/fft/myfft/synthesis/submodules/asj_fft_twadgen.vhd" is an OpenCore Plus time-limited file
Error (204012): Can't generate netlist output files because the file "D:/altera/FPGA/MyProject/fft/myfft/synthesis/submodules/asj_fft_cxb_data.vhd" is an OpenCore Plus time-limited file
Error (204009): Can't generate netlist output files because the license for encrypted file "D:/altera/FPGA/MyProject/fft/myfft/synthesis/submodules/asj_fft_bfp_ctrl.vhd" is not available
Error (204009): Can't generate netlist output files because the license for encrypted file "D:/altera/FPGA/MyProject/fft/myfft/synthesis/submodules/asj_fft_tdl_bit.vhd" is not available
Error (204009): Can't generate netlist output files because the license for encrypted file "D:/altera/FPGA/MyProject/fft/myfft/synthesis/submodules/twid_rom.vhd" is not available
Error (204009): Can't generate netlist output files because the license for encrypted file "D:/altera/FPGA/MyProject/fft/myfft/synthesis/submodules/asj_fft_bfp_o.vhd" is not available
我上学期做课程设计也遇到这样的问题，一直没解决，之前没用过第三方的EDA工具。
听我老师讲要把 IP核的文件 和 仿真文件 在一个文件夹，不过没搞定，我老师也没做过。
等楼主的解决方法 没有大佬遇到过吗。。。。。
FFT的IP没激活 huke08@126.com 发表于 2018-3-1 12:28
FFT的IP没激活
应该不是吧，我在setting中去掉EDA工具，就可以正常编译通过的啊 一般遇到这种问题我会重新写一个fft核 4楼正解，需要单独破解。 我用的13.1的quartus FFT IP 核是可以找到破解的而且也比较稳定，后面高版本也没有放出新的IP核破解方法，用老的IP核破解方法破解了15.1的ip core FFT到没有测试，不知楼主是否破解了IP core？ IP CORE没有破解，需要单独破解。我也正解决这个问题。 话说，intel 新版本的这些 ip 该怎么破解？
IP CORE没有破解 IP license的问题！！ I核还是很厉害呀。
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