|
发表于 2012-6-18 22:58:51
|
显示全部楼层
W5100/5200/5300+STM32F103系列
或
W7200
iMCU W7200 – ARM32bit Cortex M3 with hardwired TCP/IP, MAC & PHY
ARM 32-bit Cortex-M3 内核
- 72MHz maximum frequency (1.25 DMIPS/MHz)
- 20KBytes Data Memory (RAM)
- 128KBytes Code Memory
- Low Power: Support Sleep, Stop and Standby modes
- 7 timers
- Three 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- 2 watchdog timers (Independent and Window)
- SysTick timer 24-bit down counter
- Full-duplex UART
- Programmable Watchdog Timer
- CRC calculation unit, 96-bit unique ID
- GPIO, SPI, USART and USB Interfaces
- 10BaseT/100BaseTX Ethernet PHY embedded
Hardwired TCP/IP 硬件协议栈
- Power down mode supported for saving power consumption
- Hardwired TCP/IP Protocols: TCP, UDP, ICMP, IPv4 ARP, IGMP, PPPoE, Ethernet
- Auto Negotiation (Full-duplex and half duplex), Auto MDI/MDIX
- ADSL connection with PPPoE Protocol with PAP/CHAP Authentication mode support
- 8 independent sockets which are running simultaneously
- 32Kbytes Data buffer for the Network
- Network status LED outputs (TX, RX, Full/Half duplex, Collision, Link, and Speed)
- Not supports IP fragmentation |
|