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楼主 |
发表于 2009-7-1 16:51:12
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Datasheet上有这么一段：
All word accesses must be aligned to an even address. Misaligned word data fetches are not supported, so care must be taken when mixing byte and word operations, or translating from 8-bit MCU code. If a misaligned read or write is attempted, an address error trap will be generated. If the error occurred on a read, the instruction underway is completed; if it occurred on a write, the instruction will be executed but the write will not occur. In either case, a trap is then executed, allowing the system and/or user to examine the machine state prior to execution of the address Fault.
请问什么是mixing byte and word operations？ |
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发表于 2009-7-1 16:17:43
