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楼主 |
发表于 2012-10-22 12:58:22
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telnet_port 4444
tcl_port 6666
#-------------------------------------------------------------------------
# GDB Setup
#-------------------------------------------------------------------------
gdb_port 3333
gdb_breakpoint_override hard
gdb_memory_map enable
gdb_flash_program enable
#-------------------------------------------------------------------------
# interface Setup
#-------------------------------------------------------------------------
interface ft2232
ft2232_vid_pid 0x1457 0x5118
ft2232_layout "jtagkey_prototype_v1"
ft2232_device_desc "USB<=>JTAG&RS232"
#-------------------------------------------------------------------------
# target Setup
#-------------------------------------------------------------------------
set CHIPNAME lpc1788
set CPUTAPID 0x4ba00477
set CPURAMSIZE 0x10000
set CPUROMSIZE 0x80000
set CCLK 4000
#-------------------------------------------------------------------------
# source file
#-------------------------------------------------------------------------
# NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, clocked with 4MHz internal RC oscillator
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc1788
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477
}
#delays on reset lines
jtag_khz 50
jtag_nsrst_delay 500
jtag_ntrst_delay 500
# LPC2000 & LPC1700 -> SRST causes TRST
reset_config none separate
# srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
# LPC1788 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x10000 -work-area-backup 0
# REVISIT is there any good reason to have this reset-init event handler??
# Normally they should set up (board-specific) clocking then probe the flash...
$_TARGETNAME configure -event reset-init {
mww 0x400FC040 0x01
}
# LPC1768 has 512kB of user-available FLASH (bootloader is located in separate dedicated region).
# flash bank lpc1700 <base> <size> 0 0 <target#> <variant> <cclk> [calc_checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 4000 calc_checksum
# 4MHz / 6 = 666kHz, so use 500
jtag_khz 100
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发表于 2012-10-22 10:42:34
