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楼主 |
发表于 2011-10-30 09:05:32
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周末加班调试网络, 发现一问题,主机接收有点问题,忙于查找.暂时发下部分代码.
MAC驱动部分
/******************************************************************
***** *****
***** Name: EMAC.c *****
***** Ver.: V4.05 *****
***** Date: 07/05/2010 *****
***** Auth: Andreas Dannenberg *****
***** Func: ethernet packet-driver for use with LAN- *****
***** controller DP83848C *****
***** *****
***** Keil: Module modified for use with Philips *****
***** LPC17xx EMAC Ethernet controller *****
***** *****
******************************************************************/
#include "LPC17xx.h"
#include "type.h"
#include "EMAC.h"
#include "net_cfg.h"
#include "netconf.h"
#define EMAC_PHY_AUTO 0
#define EMAC_PHY_10MBIT 1
#define EMAC_PHY_100MBIT 2
#define MAX_ADDR_LEN 6
static unsigned short *rptr;
static unsigned short *tptr;
/*********************************************************************************************************
** Function name: ENET_IRQHandler
** Descriptions: Interrupt handler for Ethernet Controller
** input parameters: 无
** output parameters: 无
** Returned value: 无
*********************************************************************************************************/
void ENET_IRQHandler(void)
{
u32_t status;
/* get the current interrupt status */
status = LPC_EMAC->IntStatus & LPC_EMAC->IntEnable;
/* Clear the interrupt. */
LPC_EMAC->IntClear = status;
if (status & (INT_RX_DONE | INT_RX_ERR))
{
/* Disable EMAC RxDone interrupts. */
// LPC_EMAC->IntEnable = (INT_RX_DONE | INT_RX_ERR);
lwip_netif_interrupt();
/* a frame has been received */
}
else if (status & INT_TX_DONE)
{
/* release one slot */
lwip_netif_interrupt();
LPC_EMAC->IntClear = status;
}
}
/*********************************************************************************************************
** Function name: write_PHY
** Descriptions: Write a value to a PHY register
** input parameters: PhyReg : PHY register number ; Value: PHY register value
** output parameters: 无
** Returned value: 无
*********************************************************************************************************/
static void write_PHY (u32_t PhyReg, u32_t Value)
{
unsigned int tout;
LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
LPC_EMAC->MWTD = Value;
/* Wait utill operation completed */
tout = 0;
for (tout = 0; tout < MII_WR_TOUT; tout++)
{
if ((LPC_EMAC->MIND & MIND_BUSY) == 0)
{
break;
}
}
}
/*********************************************************************************************************
** Function name: read_PHY
** Descriptions: Read a PHY register
** input parameters: PhyReg : PHY register number ;
** output parameters: 无
** Returned value: PHY register value
*********************************************************************************************************/
static u16_t read_PHY (u8_t PhyReg)
{
u32_t tout;
LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
LPC_EMAC->MCMD = MCMD_READ;
/* Wait until operation completed */
tout = 0;
for (tout = 0; tout < MII_RD_TOUT; tout++)
{
if ((LPC_EMAC->MIND & MIND_BUSY) == 0)
{
break;
}
}
LPC_EMAC->MCMD = 0;
return (LPC_EMAC->MRDD);
}
/*********************************************************************************************************
** Function name: rx_descr_init
** Descriptions: init rx descriptor
** input parameters: 无
** output parameters: 无
** Returned value: 无
*********************************************************************************************************/
void rx_descr_init (void)
{
u32_t i;
for (i = 0; i < NUM_RX_FRAG; i++)
{
RX_DESC_PACKET(i) = RX_BUF(i);
RX_DESC_CTRL(i) = RCTRL_INT | (ETH_FRAG_SIZE-1);
RX_STAT_INFO(i) = 0;
RX_STAT_HASHCRC(i) = 0;
}
/* Set EMAC Receive Descriptor Registers. */
LPC_EMAC->RxDescriptor = RX_DESC_BASE;
LPC_EMAC->RxStatus = RX_STAT_BASE;
LPC_EMAC->RxDescriptorNumber = NUM_RX_FRAG-1;
/* Rx Descriptors Point to 0 */
LPC_EMAC->RxConsumeIndex = 0;
}
/*********************************************************************************************************
** Function name: tx_descr_init
** Descriptions: init tx descriptor
** input parameters: 无
** output parameters: 无
** Returned value: 无
*********************************************************************************************************/
void tx_descr_init (void)
{
u32_t i;
for (i = 0; i < NUM_TX_FRAG; i++)
{
TX_DESC_PACKET(i) = TX_BUF(i);
TX_DESC_CTRL(i) = (1ul<<31) | (1ul<<30) | (1ul<<29) | (1ul<<28) | (1ul<<26) | (ETH_FRAG_SIZE-1);
TX_STAT_INFO(i) = 0;
}
/* Set EMAC Transmit Descriptor Registers. */
LPC_EMAC->TxDescriptor = TX_DESC_BASE;
LPC_EMAC->TxStatus = TX_STAT_BASE;
LPC_EMAC->TxDescriptorNumber = NUM_TX_FRAG-1;
/* Tx Descriptors Point to 0 */
LPC_EMAC->TxProduceIndex = 0;
}
/*********************************************************************************************************
** Function name: Init_EMAC
** Descriptions: configure port-pins for use with LAN-controller,reset it and send the configuration-sequence
** input parameters: 无
** output parameters: 无
** Returned value: 无
*********************************************************************************************************/
void Init_EMAC(void)
{
// Keil: function modified to access the EMAC
/* Initialize the EMAC ethernet controller. */
u32_t regv, tout, id1, id2;
/* Power Up the EMAC controller. */
LPC_SC->PCONP |= 0x40000000;
/* Enable P1 Ethernet Pins. */
LPC_PINCON->PINSEL2 = 0x50150105;
LPC_PINCON->PINSEL3 = (LPC_PINCON->PINSEL3 & ~0x0000000F) | 0x00000005;
/* Reset all EMAC internal modules. */
LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
MAC1_SIM_RES | MAC1_SOFT_RES;
LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
/* A short delay after reset. */
for (tout = 100; tout; tout--);
/* Initialize MAC control registers. */
LPC_EMAC->MAC1 = MAC1_PASS_ALL;
LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
LPC_EMAC->MAXF = ETH_MAX_FLEN;
LPC_EMAC->CLRT = CLRT_DEF;
LPC_EMAC->IPGR = IPGR_DEF;
/* PCLK=18MHz, clock select=6, MDC=18/6=3MHz */
/* Enable Reduced MII interface. */
LPC_EMAC->MCFG = MCFG_CLK_DIV20 | MCFG_RES_MII;
for (tout = 100; tout; tout--);
LPC_EMAC->MCFG = MCFG_CLK_DIV20;
/* Enable Reduced MII interface. */
LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM | CR_PASS_RX_FILT;
/* Reset Reduced MII Logic. */
LPC_EMAC->SUPP = SUPP_RES_RMII | SUPP_SPEED;
for (tout = 100; tout; tout--);
LPC_EMAC->SUPP = SUPP_SPEED;
/* Put the DP83848C in reset mode */
write_PHY (PHY_REG_BMCR, 0x8000);
for (tout = 1000; tout; tout--);
/* Wait for hardware reset to end. */
for (tout = 0; tout < 0x100000; tout++)
{
regv = read_PHY (PHY_REG_BMCR);
if (!(regv & 0x8000))
{
/* Reset complete */
break;
}
}
/* Check if this is a DP83848C PHY. */
id1 = read_PHY (PHY_REG_IDR1);
id2 = read_PHY (PHY_REG_IDR2);
if (((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID)
{
/* Configure the PHY device */
/* Use autonegotiation about the link speed. */
write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
/* Wait to complete Auto_Negotiation. */
for (tout = 0; tout < 0x100000; tout++)
{
regv = read_PHY (PHY_REG_BMSR);
if (regv & 0x0020)
{
/* Autonegotiation Complete. */
break;
}
}
}
/* Check the link status. */
for (tout = 0; tout < 0x10000; tout++)
{
regv = read_PHY (PHY_REG_STS);
if (regv & 0x0001)
{
/* Link is on. */
break;
}
}
/* Configure Full/Half Duplex mode. */
if (regv & 0x0004)
{
/* Full duplex is enabled. */
LPC_EMAC->MAC2 |= MAC2_FULL_DUP;
LPC_EMAC->Command |= CR_FULL_DUP;
LPC_EMAC->IPGT = IPGT_FULL_DUP;
}
else
{
/* Half duplex mode. */
LPC_EMAC->IPGT = IPGT_HALF_DUP;
}
/* Configure 100MBit/10MBit mode. */
if (regv & 0x0002)
{
/* 10MBit mode. */
LPC_EMAC->SUPP = 0;
}
else
{
/* 100MBit mode. */
LPC_EMAC->SUPP = SUPP_SPEED;
}
/* Set the Ethernet MAC Address registers */
LPC_EMAC->SA0 = (LWIP_MAC1 << 8) | LWIP_MAC0 ;
LPC_EMAC->SA1 = (LWIP_MAC3 << 8) | LWIP_MAC2 ;
LPC_EMAC->SA2 = (LWIP_MAC5 << 8) | LWIP_MAC4 ;
/* Initialize Tx and Rx DMA Descriptors */
rx_descr_init ();
tx_descr_init ();
/* Receive Broadcast and Perfect Match Packets */
LPC_EMAC->RxFilterCtrl = RFC_BCAST_EN | RFC_PERFECT_EN;
/* Reset all interrupts */
LPC_EMAC->IntClear = 0xFFFF;
/* Enable EMAC interrupts. */
LPC_EMAC->IntEnable = INT_RX_DONE | INT_TX_DONE;
/* Enable receive and transmit mode of MAC Ethernet core */
LPC_EMAC->Command |= (CR_RX_EN | CR_TX_EN);
LPC_EMAC->MAC1 |= MAC1_REC_EN;
/* Enable the ENET Interrupt */
NVIC_EnableIRQ(ENET_IRQn);
}
/*********************************************************************************************************
End Of File
*********************************************************************************************************/ |
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发表于 2011-10-29 13:13:10
