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发表于 2014-8-25 07:26:43
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搞定了么,不好意思啊,周末出去玩了没上论坛。
void SetBusClk(void)
{
CLKSEL=0X00; // disengage PLL to system
PLLCTL_PLLON=1; // turn on PLL
SYNR=0x00 | 0x01; // VCOFRQ[7:6];SYNDIV[5:0]
// fVCO= 2*fOSC*(SYNDIV + 1)/(REFDIV + 1)
// fPLL= fVCO/(2 × POSTDIV)
// fBUS= fPLL/2
// VCOCLK Frequency Ranges VCOFRQ[7:6]
// 32MHz <= fVCO <= 48MHz 00
// 48MHz < fVCO <= 80MHz 01
// Reserved 10
// 80MHz < fVCO <= 120MHz 11
REFDV=0x80 | 0x01; // REFFRQ[7:6];REFDIV[5:0]
// fREF=fOSC/(REFDIV + 1)
// REFCLK Frequency Ranges REFFRQ[7:6]
// 1MHz <= fREF <= 2MHz 00
// 2MHz < fREF <= 6MHz 01
// 6MHz < fREF <= 12MHz 10
// fREF > 12MHz 11
// pllclock=2*osc*(1+SYNR)/(1+REFDV)=32MHz;
POSTDIV=0x00; // 4:0, fPLL= fVCO/(2xPOSTDIV)
// If POSTDIV = $00 then fPLL is identical to fVCO (divide by one).
_asm(nop); // BUS CLOCK=16M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1; //engage PLL to system;
} |
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