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发表于 2008-1-10 14:31:59
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AT45DB的I/O是可以接5v的(它内部有钳位),因此所有的输入脚可以直接接5v.
输出脚需要考虑以下2个问题:
1.AT45DB的输出应该接对面的输入脚.如果对面也是输出,(对面不管是输出0还是1)可能会出现问题。
2.逻辑电平的考虑。主要是对面的器件是TTL还是COMS的。
TTL Logic Levels
The minimum VIH requirement of a TTL-compatible input is 2.0V to register a logic 1, and the VIL requirement of a TTL-compatible input is 0.8V to register a logic 0. Refer to the manufacturers datasheet to ensure full compliance with the input and output logic level requirements.
CMOS Logic Levels
The minimum VIH requirement for a CMOS-compatible input is 0.7 x VCC to register a logic 1, where VCC is the supply voltage of the input device. For a CMOS device operating with a VCC of 4.5V to 5.5V, this gives a VIH requirement of 3.15V to 3.85V. The VIL requirement of a CMOS-compatible input is 0.2 x VCC to register a logic 0. This gives a
VIL requirement of 0.9V to 1.1V.
M128是CMOS器件,0.7*5 = 3.5v 才算可靠的逻辑1。45DB的3v的输出比较危险。因此正式产品的设计中,SO和BUSY输出要使用电平转换电路(不是简单的上拉)。
我的板是早期的设计,开始有5V的45DB样片,后来ATMEL没有5v的片子了,所以没有焊上。 |
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