vs1001的DCLK前的与门要吗？

song

DCLK引脚前的与门是否一定要，若DCLK直接接到SCLK上可不可以？请高手指点。

song

5555555555555谁来帮帮忙？觉得它的应用手册没讲清楚， vs1001的

HJJourAVR

GIO1=0----配置状态

GIO1=1----数据解码状态

恐怕不行。

sdsdsd

In this connection, GIO1 acts as a bus select. When GIO1 is set to 1, xCS is inactive, and SCK is let

through the AND gate to DCLK. Thus, now data is sent to the SDI bus. When GIO1 is set to 0, xCS

activates, and DCLK stops because of the AND gate. Thus, data now goes only to the SCI bus.

请看应用资料的说明!

song

This is not recommended but at least with current VS1001k products you

can do it. The AND port is there because there is no Chip Select for the

SDI port. But it happens to be that SDI stops receiving one byte after

BSYNC goes low so you can use BSYNC to be like a Chip Select for SDI.

Officially we do not guarantee this to work.





这是芬兰公司关于DCLK和SCLK能否直接来的回复，他说碰巧可用BSY作SDI的片选，我想问有人不用与门成功过吗？我看网上好像有这样的成功的例子