关于24L01的中断问题

lgymilu

我采用查询方法查询24L01中断，第一次能查到接收中断，之后将数据发到串口，然后将中断清除，但是之后就再查不到，中断了，我发送端是一直在发送的

lgymilu

附程序：

#include "msp430x14x.h"
void init_chip(void);               
void init_uart(void);
void init_clock(void);

unsigned char SPI_RW(unsigned char byte);
unsigned char SPI_Write(unsigned char byte);
unsigned char SPI_RW_Reg(unsigned char reg, unsigned char value);
unsigned char SPI_Read(unsigned char reg);
unsigned char SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes);
unsigned char SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes);  
void StandbyI(void);
void StadbyII(void);
void RX_Mode(void);
void TX_Mode(void);
void setupnrf(void);

void delay(int a);
void IRQEINT(void);
/******************************************************************************/  
#define ADR_WIDTH    5   // 5 bytes TX(RX) address width (地址长度)
#define PLOAD_WIDTH  20  // 20 bytes TX payload (最大是 32 bytes)

unsigned char        TX_ADDRESS[ADR_WIDTH]                = {0x34,0x43,0x10,0x10,0x01}; // Define a static TX address (即目标地址)
unsigned char        Local_ADDRESS[ADR_WIDTH]        = {0x34,0x43,0x10,0x10,0x01}; // Define a static RX address (即本地地址)
                                                                                          
unsigned char rx_buf[PLOAD_WIDTH];        //接收缓存容器
unsigned char tx_buf[PLOAD_WIDTH]={'c','o','n','g','r','a','t','u','l','a','t','i','o','n',' ','r','i','g','h','t'};        //发送缓存容器
//unsigned char tx_buf[PLOAD_WIDTH]={0x01,0x02,0x03,0x04,0x05,0x01,0x02,0x03,0x04,0x05,0x01,0x02,0x03,0x04,0x05,0x34,0x43,0x10,0x10,0x01};        //发送缓存容器
unsigned char flag;                                        //标志
int flag_r;
int flag_t;
int flag_e;
//************************************************************************************

/**************************************************************************************/
unsigned char        sta;                          //状态标志
#define RX_DR      sta&0x40       // RX_DR=sta^6;  接收数据中断，当接收到有效数据后置1
#define TX_DS      sta&0x20       //TX_DS =sta^5;  数据发送完成中断
#define MAX_RT     sta&0x10       // MAX_RT =sta^4; 达到最多次重发中断
/**************************************************************************************/
/**************************************************************************************/
//DEFINE IO
#define SET_CSN P5OUT|=0X01
#define CLR_CSN P5OUT&=0XFE
//#define SET_CE  P5OUT|=0X10
//#define CLR_CE  P5OUT&=0XEF
#define SET_CE    P1OUT|=0X40
#define CLR_CE    P1OUT&=0XBF
#define SET_MOSI  P5OUT|=0X02
#define CLR_MOSI  P5OUT&=0XFD
#define SET_SCK   P5OUT|=0X08
#define CLR_SCK   P5OUT&=0XF7

/**************************************************************************************/
// SPI(nRF24L01) commands
#define READ_REG        0x00  // Define read command to register
#define WRITE_REG       0x20  // Define write command to register
#define RD_RX_PLOAD     0x61  // Define RX payload register address
#define WR_TX_PLOAD     0xA0  // Define TX payload register address
#define FLUSH_TX        0xE1  // Define flush TX register command
#define FLUSH_RX        0xE2  // Define flush RX register command
#define REUSE_TX_PL     0xE3  // Define reuse TX payload register command
#define NOP             0xFF  // Define No Operation, might be used to read status register
// SPI(nRF24L01) registers(addresses)
#define CONFIG          0x00  // 'Config' register address
#define EN_AA           0x01  // 'Enable Auto Acknowledgment' register address
#define EN_RXADDR       0x02  // 'Enabled RX addresses' register address
#define SETUP_AW        0x03  // 'Setup address width' register address
#define SETUP_RETR      0x04  // 'Setup Auto. Retrans' register address
#define RF_CH           0x05  // 'RF channel' register address
#define RF_SETUP        0x06  // 'RF setup' register address
#define STATUS          0x07  // 'Status' register address
#define OBSERVE_TX      0x08  // 'Observe TX' register address
#define CD              0x09  // 'Carrier Detect' register address
#define RX_ADDR_P0      0x0A  // 'RX address pipe0' register address
#define RX_ADDR_P1      0x0B  // 'RX address pipe1' register address
#define RX_ADDR_P2      0x0C  // 'RX address pipe2' register address
#define RX_ADDR_P3      0x0D  // 'RX address pipe3' register address
#define RX_ADDR_P4      0x0E  // 'RX address pipe4' register address
#define RX_ADDR_P5      0x0F  // 'RX address pipe5' register address
#define TX_ADDR         0x10  // 'TX address' register address
#define RX_PW_P0        0x11  // 'RX payload width, pipe0' register address
#define RX_PW_P1        0x12  // 'RX payload width, pipe1' register address
#define RX_PW_P2        0x13  // 'RX payload width, pipe2' register address
#define RX_PW_P3        0x14  // 'RX payload width, pipe3' register address
#define RX_PW_P4        0x15  // 'RX payload width, pipe4' register address
#define RX_PW_P5        0x16  // 'RX payload width, pipe5' register address
#define FIFO_STATUS     0x17  // 'FIFO Status Register' register address
/***************************************************************************************/
void init_chip()
{
  P5SEL=0;
  P5DIR|=0X1B;                  //P5.0 5.1 5.35.4输出P5.2输入
  P1SEL=0;
  P1DIR|=0X40;
  CLR_CE;
  SET_CSN;
  CLR_SCK;
  CLR_MOSI;  
  P1OUT=0X00;
  P1IE|=0X80;
  P1IES|=0X80;
  P1IFG=0X00;
  //_EINT();
}
void init_clock()
{
  BCSCTL1=0X80;
  do
  {IFG1&=~OFIFG;
  delay(159);}
  while(IFG1&OFIFG);
  BCSCTL2=SELM0+SELM1;
  
}
void init_uart()
{
  P3SEL|=0X30;
  UCTL0=SWRST;
  ME1|=UTXE0+URXE0;                     //使能发送接收
  UCTL0|=CHAR;
  UTCTL0=SSEL0;
  U0BR0=0X03;
  U0BR1=0X00;
  U0MCTL=0X4A;   
  UCTL0&=~SWRST;                  
  IE1|=URXIE0+UTXIE0;                   //使能中断
}
unsigned char SPI_Write(unsigned char byte)
{
  int i;
  for(i=0;i<8;i++)
  {
    if(byte&0x80!=0)
      SET_MOSI;
    else
      CLR_MOSI;
    byte=byte<<1;
    SET_SCK;
    if(P5IN&0x40)
      byte|=0x01;
    else
      byte&=0xfe;
    CLR_SCK;
   
  }
  return(byte);
}

void StandbyI()
{
  SPI_RW_Reg(WRITE_REG+CONFIG,0X0E);
}
void StandbyII()
{
  SPI_RW_Reg(WRITE_REG+CONFIG,0X3E);
  SPI_RW(FLUSH_TX);
  delay(1000);
  SET_CE;
}
void setupnrf()
{
  SPI_RW_Reg(WRITE_REG+EN_RXADDR,0X01);
  SPI_RW_Reg(WRITE_REG+SETUP_AW,0X03);
}

unsigned char SPI_RW(unsigned char byte)
{
  int i;
for(i=0;i<8;i++)
  {  
    if(byte&0x80)
    P5OUT|=0X02;
  else
    P5OUT&=0XFD;
  byte<<=1;
  _NOP();_NOP();_NOP();
   _NOP();_NOP();_NOP();
  P5OUT|=0X08;
  _NOP();_NOP();_NOP();
  _NOP();_NOP();_NOP();
  _NOP();
  if(P5IN&0X04)
    byte|=0x01;
  else
    byte&=0xfe;
    _NOP();_NOP();_NOP();
     _NOP();_NOP();_NOP();
  P5OUT&=0XF7;
  }
  return(byte);  
}
unsigned char SPI_RW_Reg(unsigned char reg,unsigned char value)
{
  SET_CSN;
  CLR_CSN;
  unsigned char status;
  status=SPI_RW(reg);
  SPI_RW(value);
  SET_CSN;
  return(status);
}
unsigned char SPI_Read(unsigned char reg)
{
  SET_CSN;
  CLR_CSN;
  unsigned char reg_val;
  SPI_RW(reg);
  reg_val=SPI_RW(0);
  SET_CSN;
  return(reg_val);
}
unsigned char SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
{
  SET_CSN;
  CLR_CSN;
  unsigned char byte_ctr,status;
  status=SPI_RW(reg);
  for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
  {
    pBuf[byte_ctr]=SPI_RW(0);
  }
  SET_CSN;
  return(status);
}
unsigned char SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
{
  SET_CSN;
  CLR_CSN;
  unsigned char byte_ctr,status;
  status=SPI_RW(reg);
  for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
  {
    SPI_RW(*pBuf++);
  }
  SET_CSN;
  return(status);
}
void TX_Mode(void)
{
  //P1OUT&=0XBF;          //P1.6=0
  CLR_CE;        //P5.4=0
  SPI_Write_Buf(WRITE_REG+TX_ADDR,TX_ADDRESS,ADR_WIDTH);
  SPI_Write_Buf(WRITE_REG+RX_ADDR_P0,TX_ADDRESS,ADR_WIDTH);
  SPI_Write_Buf(WR_TX_PLOAD,tx_buf,PLOAD_WIDTH);  
  SPI_RW_Reg(WRITE_REG+CONFIG,0X0E);
  SPI_RW_Reg(WRITE_REG+EN_AA,0X00);
  SPI_RW_Reg(WRITE_REG+EN_RXADDR,0X01);
  SPI_RW_Reg(WRITE_REG+SETUP_RETR,0X1a);
  SPI_RW_Reg(WRITE_REG+RF_CH,0X00);
  SPI_RW_Reg(WRITE_REG+RF_SETUP,0X07);

  //P1OUT|=0X40;          //P1.6=1
  SET_CE;        //P5.4=1
  delay(159);
  CLR_CE;
}
void RX_Mode(void)
{
  //P1OUT&=0XBF;          //P1.6=0
  CLR_CE;            //P5.4=0
  SPI_Write_Buf(WRITE_REG+RX_ADDR_P0,Local_ADDRESS,ADR_WIDTH);
  SPI_RW_Reg(WRITE_REG+EN_AA,0X00);
  SPI_RW_Reg(WRITE_REG+EN_RXADDR, 0x01);
  SPI_RW_Reg(WRITE_REG+SETUP_AW,0X03);
  SPI_RW_Reg(WRITE_REG+RF_CH,0X00);
  SPI_RW_Reg(WRITE_REG+RF_SETUP,0X07);
  SPI_RW_Reg(WRITE_REG+RX_PW_P0,PLOAD_WIDTH);  
  SPI_RW_Reg(WRITE_REG+CONFIG,0X0F);
  //P1OUT|=0X40;          //P1.6=1
SET_CE;         //P5.4=1
delay(159);
}
void delay(int a)
{
  while(a--){}
}
void IRQEINT()
{
  sta=SPI_Read(STATUS);
  int i;
  if(RX_DR)
  {
    SPI_Read_Buf(RD_RX_PLOAD,rx_buf,20);
    for(i=0;i<PLOAD_WIDTH;i++)
    {TXBUF0=rx_buf;
      while((UTCTL0&TXEPT)!=TXEPT);
    }
    flag=0;
  }
  else
    flag=1;
  SPI_RW_Reg(WRITE_REG+STATUS,sta);
}
int main( void )
{
  // Stop watchdog timer to prevent time out reset
  WDTCTL = WDTPW + WDTHOLD;
  init_clock();
  init_chip();
  init_uart();
  RX_Mode();
    while(1)
    {
     IRQEINT();
    }
  return 0;
}

lgymilu

而且，我采用中断方式，也跳不进中断……

lgymilu

没有回应吗啊…………