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楼主 |
发表于 2011-5-8 21:24:00
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知道是怎么回事了，是CPLD上的程序有点缺陷，改进后整体图像不会有问题了，偶尔会有一些零星的色彩错误的点，手拿着就完美了。:)
附上VHDL源程序，很容易看懂的。
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
ENTITY MCU_CPLD_LCD IS
PORT(
MCU_BUS: IN STD_LOGIC_VECTOR(15 DOWNTO 0);
MCU_WR, MCU_RS, MCU_RD, MCU_CS, MCU_RST: IN BIT;
SEL: IN BIT;
LCD_BUS: OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
LCD_WR, LCD_RS, LCD_RD, LCD_CS, LCD_RST: OUT BIT;
CAM_BUS: IN STD_LOGIC_VECTOR(7 DOWNTO 0);
HREF: IN BIT;
PCLK: IN STD_LOGIC
);
END MCU_CPLD_LCD;
ARCHITECTURE MAIN OF MCU_CPLD_LCD IS
SIGNAL WR: BIT;
SIGNAL BUF: STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL BUFFER_BUS: STD_LOGIC_VECTOR(15 DOWNTO 0);
BEGIN
-- SEL = 0 -> LCD_BUS and LCD_WR are directly connected to MCU for configuration
-- SEL = 1 -> LCD_BUS and LCD_WR are fed according to PCLK by CPLD
WITH SEL SELECT
LCD_BUS <= MCU_BUS WHEN '0',
BUFFER_BUS WHEN OTHERS;
WITH SEL SELECT
LCD_WR <= MCU_WR WHEN '0',
WR OR (NOT HREF) WHEN OTHERS;
--RISING EDGE OF PCLK
-- First byte: write the byte to the buffer
-- Second byte: write the buffer and current camera bus data to LCD bus
--FALLING EDGE OF PCLK
-- First byte: WR = 1
-- Second byte: WR = 0
PROCESS(PCLK)
BEGIN
--Very important! Must set WR when HREF is low
IF(HREF = '0') THEN
WR <= '1';
ELSIF(RISING_EDGE(PCLK)) THEN
IF(WR = '1') THEN
BUF <= CAM_BUS;
ELSE
BUFFER_BUS(15 DOWNTO 8) <= BUF;
BUFFER_BUS(7 DOWNTO 0) <= CAM_BUS;
END IF;
ELSIF (FALLING_EDGE(PCLK)) THEN
WR <= NOT WR;
END IF;
END PROCESS;
LCD_CS <= MCU_CS;
LCD_RS <= MCU_RS;
LCD_RD <= MCU_RD;
LCD_RST <= MCU_RST;
END MAIN; |
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发表于 2011-5-8 13:12:29
