avr asp下载时候只用了mosi miso sck vcc gnd reset这六个,那ss脚呢?

424778940

如题...
isp只用了mosi miso sck vcc gnd reset
ss脚到底是干吗用的...
英文手册看了半天没看懂...

1. 
   
2. 21.1.1 Slave Mode
   
3. When the SPI is configured as a Slave, the Slave Select (SS) pin is always input. When SS is held low, the SPI is activated, and MISO becomes an output if configured so by the user. All other pins are inputs.
   
4. When SS is driven high, all pins are inputs, and the SPI is passive, which means that it will not receive incoming data. Note that the SPI logic will be reset once the SS pinis driven high.
   
5. The SS pin is useful for packet/byte synchronization to keep the slave bit counter synchronous with the master clock generator. When the SS pin is driven high, the SPI slave will immediately reset the send and receive logic, and drop any partially received data in the Shift Register.
   
6. 
   
7. 21.1.2 Master Mode
   
8. When the SPI is configured as a Master (MSTR in SPCR is set), the user can determine the direction of the SS pin.
   
9. If SS is configured as an output, the pin is a general output pin which does not affect the SPI system. Typically, the pin will be driving the SS pin of the SPI Slave.
   
10. If SS is configured as an input, it must be held high to ensure Master SPI operation. If the SS pin is driven low by peripheral circuitry when the SPI is configured as a Master with the SS pin defined as an input, the SPI system interprets this as another master selecting the SPI as a slave and starting to send data to it.
    
11. To avoid bus contention, the SPI system takes the following actions:
    
12. 1. The MSTR bit in SPCR is cleared and the SPI system becomes a Slave. As a result of the SPI becoming a Slave, the MOSI and SCK pins become inputs.
    
13. 2. The SPIF Flag in SPSR is set, and if the SPI interrupt is enabled, and the I-bit in SREG is set, the interrupt routine will be executed.
    
14. Thus, when interrupt-driven SPI transmission is used in Master mode, and there exists a possibility that SS is driven low, the interrupt should always check that the MSTR bit is still set. If the MSTR bit has been cleared by a slave select, it must be set by the user to re-enable SPI Master mode.
    

复制代码

yklstudent

百度在线翻译嘛 难道这个也不会？

424778940

yklstudent 发表于 2012-9-23 16:30
百度在线翻译嘛 难道这个也不会？

= =...百度就算了...谷歌翻译出来的也是语无伦次....

tony90

SS是SPI的片选信号，主机输送到从机，如果没记错的话应该是低电平有效，USBasp下位机只有开发板所以不用片选的

lngdzph

tony90 发表于 2012-9-29 22:04
SS是SPI的片选信号，主机输送到从机，如果没记错的话应该是低电平有效，USBasp下位机只有开发板所以不用片 ...

我觉得是把复位引脚当SS了。