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本帖最后由 wwwdege 于 2018-10-30 16:50 编辑
这是一款收音机的频率控制部分,(150KHZ`30MHZ),想参照这个原理图做10HZ的精度(45~75MHZ),本人模拟零基础,看不懂这个原理图是怎么利用AD9850和MC145170实现10HZ精度的,写程序都无从下手,论坛高手多,望高手帮我分析一下,十分感谢
实在搞不定为什么DDS输出一个400KHZ的方波进入锁相环FIN脚起什么作用,而锁相环手册上写的是这个脚的频率范围是5M以上
The same PLL, U25, is used for HF and FM
operation. For HF, the 45.1-75 MHz LO signal is
generated by oscillator Q10 then amplified Q2 to be sent
to the HF 1st mixer. Q3 amplifies the same oscillator
signal to be sent back to the PLL divider. U24 is a direct
digital synthesizer that functions as a fractional
frequency divider to divide the oscillator frequency down
to 400 kHz. It is programmed like the PLL by the front
panel board processor. After the divider, the signal is
returned to the PLL. The PLL provides up and down
correction pulses that are amplified by Q12, Q11, and
Q48, and then filtered by C253 to produce the DC
voltage that sets the oscillator frequency.
For FM, the 86.7-118.7 MHz LO signal is generated
by Q9 and amplified by Q1 before being sent to the FM
mixer. From Q1, it also is fed directly back to the PLL,
without passing through U24. Q69 selects the proper
damping depending on which oscillator (HF or FM) is in
use.
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阿莫论坛20周年了!感谢大家的支持与爱护!!
如果天空是黑暗的,那就摸黑生存;
如果发出声音是危险的,那就保持沉默;
如果自觉无力发光,那就蜷伏于牆角。
但是,不要习惯了黑暗就为黑暗辩护;
也不要为自己的苟且而得意;
不要嘲讽那些比自己更勇敢的人。
我们可以卑微如尘土,但不可扭曲如蛆虫。
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