[求助]数码管限流电阻导致仿真出错

fantasticzhu

在某些实验中，在共阴数码管的公共端与地之间加一个220欧的电阻后，仿真时会出现以下错误，不加电阻则可以正常运行。这是怎么回事呢？







SIMULATION LOG

==============

Design:   F:\进行中题目\单片机程序设计及Proteus仿真\Proteus examples\11.DSN

Doc. no.: <NONE>

Revision: <NONE>

Author:   <NONE>

Created:  06/09/04

Modified: 06/09/16



Compiling source files...

Build completed OK.

Compiling netlist...

Linking netlist...

Partition analysis...



Simulating partition 1 [C790C482]...

PROSPICE Release 6.9 SP4 (C) Labcenter Electronics 1993-2006.

SPICE Kernel Version 3f5. (C) Berkeley University ERL.



Reading netlist...

Reading SPICE models...

Building circuit...

Instantiating SPICE models...

[U1] Loading HEX file '..\Programmes\Programmes.hex'.

[U1] Read total of 76 bytes from file '..\Programmes\Programmes.hex'.

[SPICE] DELMIN increased to 2.22045e-16 due to lack of time precision

[SPICE] transient GMIN stepping at time=1.99706

[SPICE] Error 106 - TRAN:  Timestep too small; time = 1.99706, timestep = 2.77556e-17: trouble with node "#00024"

.

Totaliters=5078, Totalsteps=395, Goodsteps=376, Badsteps=19





Real Time Simulation FAILED.

adibe

错误提示 timestep too small，是说刷新时间不？把时间加长点呢？

shihaidong

把例子帖出来好研究